The present disclosure relates generally to integrated circuits and, more specifically, to a junction barrier Schottky diodes (JBS) in the integrated circuit.
Integrated circuits have generally included Schottky diodes for power applications. Schottky diodes tend to be very leaky at high reverse bias and high temperatures. Circuit designers have used junction barrier Schottky diodes to provide a solution to the leaky Schottky diodes. This combination provides a Schottky-like forward conduction and PN diode like reverse blocking of voltage. It basically includes a PN junction and a Schottky junction diode in parallel. The formation of Schottky diodes in integrated circuits generally uses the metal which forms a silicide with a silicon substrate that is used throughout the integrated circuit. For example, the integrated circuit that requires a low leakage, low forward bias drop Schottky diode, is typically manufactured in a process which uses Titanium as the silicidation metal. The resulting TiSi2 is known to have a low barrier height which yields low forward bias drop, but has higher reverse leakage than other silicides. In some applications it may be desirable to have a lower reverse leakage current at the expense of higher forward bias voltage drop. To use different silicides in the same fabrication process has historically been avoided because of the cross contamination. The present disclosure provides a method for implementing a dual silicide process without cross contamination.
An integrated circuit of the present disclosure includes junction barrier Schottky diode which has an N-type silicon well having surface; a P-type anode region in the surface of the well; and a portion of the surface of the well horizontally abutting the anode region being an N-type Schottky region. A first silicide layer is on the Schottky region and an adjoining portion of the anode region. The first silicide layer forms a Schottky barrier with the Schottky region. A second silicide layer of a different material than the first silicide layer is on the anode region. An ohmic contact is to the second silicide layer on the anode region, and an ohmic contact is to the well.
The first and second silicide layers are spaced from each other on the anode region. The well may include an N-type cathode contact region in the surface having a higher impurity concentration than the Schottky region's impurity concentration, and the ohmic contact to the well is to the cathode contact region or to portions of the second silicide layer on the cathode contact region. The well may include an N-type buried layer having a higher impurity concentration than the well's impurity concentration and the N-type cathode contact region extends from the surface to buried layer.
A method of manufacturing an integrated circuit having the junction barrier Schottky diode of the disclosure includes forming a P-type anode region in a surface of an N-type well; forming a first mask with an opening exposing an N-type Schottky region of the surface of the well and adjoining portion of the anode region; and applying a first material which forms a first silicide layer of the first material with the exposed portions of the Schottky and anode regions. A second mask is formed with an opening exposing a portion of the anode region not having the first silicide layer; and a second material, different from the first material, is applied and forms a second silicide layer of the second material with the exposed portion of the anode region. An ohmic contact is made to the second silicide layer on the anode region, and an ohmic contact is made to the well.
The first and second silicide layers are formed spaced from each other on the anode region. The method may include forming an N-type cathode contact region in the surface having a higher impurity concentration than the Schottky region's impurity concentration. The second silicide layer may be formed on the cathode contact region. The ohmic contact to the well may be directly to the cathode contact region or to the second silicide layer on the cathode contact region. The well may include an N-type buried layer having a higher impurity concentration than the well's impurity concentration; and the methods includes forming the N-type cathode contact region extending from the surface to buried layer, and forming the ohmic contact to the well to the cathode contact region.
These and other aspects of the present disclosure will become apparent from the following detailed description of the disclosure, when considered in conjunction with accompanying drawings.